Circuit arrangements comprising cascaded field effect transistors, for example tetrodes or pentodes, are often used as controllable amplifiers for high-frequency applications. The cascaded field effect transistors have a plurality of gate terminals, the signal to be processed generally being applied to a first gate while a second gate is used to control the gain. In this case, the control is intended to cover a large gain interval (e.g., 70 dB). A circuit arrangement of this type is shown, for example, in the document DE 41 34 177.
Regulating the gain of MOS tetrodes/pentodes is generally carried out by ramping down the voltage which is applied to the second gate. A linearized control response, a high control range and low intermodulation distortion is achieved if, associated with the ramping down of the voltage which is applied to the second gate, the potential on the first gate is ramped up. In earlier circuit arrangements comprising cascaded field effect transistors, for example tuner circuits for television receivers, this was achieved by a circuit for stabilizing the operating current, which normally comprised a source resistor.
FIG. 8 shows such a circuit arrangement schematically, which comprises two cascaded field effect transistors AT1 and AT2 and a source resistor Rs and a capacitor Cs for high-frequency blocking. The signal E to be amplified is connected to the gate electrode G1 of the first field effect transistor AT1, while the control of the gain is carried out via a signal R which is applied to the gate electrode G2 of the second field effect transistor AT2. Although the additional source resistor Rs reduced the useable supply voltage by about 3 volts, this disadvantage could be tolerated, since these circuits were normally operated with supply voltages of 9 to 12 volts. FIG. 9 shows the behavior of this circuit using the example of the gain of the circuit as a function of the voltage applied to the gate electrode G2 (dashed line). It can be seen that the gain of the circuit may be controlled largely linearly over a relatively wide range with the voltage applied to the gate electrode G2.
In modern electronic signal processing, smaller and smaller operating voltages are being used. This in turn results in the situation where a source resistor Rs, as shown in FIG. 8, cannot be used in modern circuit arrangements, since otherwise too small a proportion of the supply voltage is available for the two cascaded field effect transistors AT1 and AT2. However, because the source resistor Rs is missing, the substantial control range is now determined solely by the transistor characteristics.
FIG. 9 shows the behavior of such a circuit without a source resistor Rs (continuous line). Starting from a ramped-up state, the ramping-down action is initially carried out very moderately, in order then to change to a short and steep drop. Therefore, the actual control of the gain is carried out over a relatively small interval for the voltage applied to the gate electrode G2. Because of the short and steep drop of the gain, however, it becomes more and more difficult to use the circuit within a complete control loop for controlling the signal gain since, in the range of the short and steep drop, even small changes in the voltage supplied to the gate electrode G2 and small deviations in the transistor characteristics lead to drastic changes in the gain of the control path. Increasingly refined transistors and the trend to lower operating voltages intensify these characteristics.